technical data pwm power control ic with interference suppression IL6083 description the designed ic is based on bipolar technology for the control of an n-channel power mosfet used as a high-side switch. the ic is ideal for us e in brightness control systems (dimming) of lamps, for example, in dashboard applications. features ? protection against short-circuit, load dump overvoltage and reverse vs ? duty cycle 18 to 100% continuously ? internally reduced pulse slope of lamp's voltage ? interference and damage protection ? charge-pump noise suppression ? ground-wire breakage protection IL6083n dip-8 t a = ?40 ~ +110 pin configuration figure 1. pin sy mbol pin description 01 vs supply voltage 02 gnd ic ground 03 vi control input (duty cycle) 04 osc oscillator 05 delay short-circuit protection delay 06 sense current sensing 07 2vs voltage doubler 08 output output rev. 00
IL6083 block diagram w i th external circuit figure 2. maximum and absolute maximum ratings stresses bey ond those listed under ?absolut e maximum ratings? may cause permanent damage to the device. t h is is a stress rating only and functional operation of the device at these or any other conditions bey ond those indicated in the operational sections of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability . maximum ratings absolute maximum ratings parameter, sy mbol, unit m i n m a x m i n m a x supply voltage vbatt, v 9.0 25 32.5 storage temperature tstg , o - 5 5 + 1 2 5 ambient operation temperature range t a , o c - 4 0 + 1 1 0 - 5 5 + 1 2 5 junction maximum temperature tj(max), o c + 1 5 0 temperature resistance junction ? ambient rth j-a, =120 o c/w rev. 00
IL6083 functional description pin 1, supply voltage, v s or v batt ov erv o ltage detection stage 1 if overvoltages of v batt > 20 v (typically) occur, the external transistor is switched off, and switched on again at v batt < 18.5 v (hysteresis). stage 2 if v batt > 28.5 v (typically), the voltage limit ation of the ic is reduced from v s = 26 v to 20 v. the gate of the external transistor remains at the potential of t he ic ground, thus producing voltage sharing between fet and lamps in the event of overvoltage pulses (e.g. , l oad dump). the short - circuit protection is not in operation. at v batt approximately < 23 v, the overvoltage detection stage 2 is switched off. thus, during overvoltage detection stage 2, the lamp voltage v lamp is calculated as follows: v lamp = v batt - v s - v gs v s = supply voltage of the ic at overvoltage detection stage 2 v gs = gate - source voltage of the fet underv oltage detection in the event of voltages of approximately v batt < 5.0 v, the external fet is switched off and the latch for short-circuit detection is reset. a hysteresis ensures that the fet is switched on again at approximately v batt pin 2, gnd ground-w i re breakage to protect the fet in the case of ground-wire breakage, a 1 m
resistor between gate and source is recommended to provide proper switch-off conditions. pin 3, control input the pulse width is controlled by means of an external potentiometer (47 k
). the characteristic (angle of rotation/duty cycle) is linear. the duty cycle can be vari ed from 18 to 100%. it is possible to further restrict the duty cycle with the resistors r 1 and r 2 (see figure 4). in order to reduce the power dissipation of the fet and to increase the lifetime of the lamps, the ic automatically reduces the maximum duty cycl e at pin 8 if the supply voltage exceeds v 2 = 13 v. pin 3 is protected against short-circuit to v batt and ground (v batt ? 16.5 v). pin 4, oscillator the oscillator determines the frequency of the output vo ltage. this is defined by an external capacitor, c 2 . it is charged with a constant current, i, until the upper switching threshold is reached. a second current source is then activated which taps a double current, 2 x i, from the charging current. the capacitor, c 2 , is thus discharged at the current, i, until the lower switching threshold is reached. the second source is then switched off again and the procedure starts once more. rev. 00
IL6083 example for oscillator frequency calculation switching thresholds v t 100 = high switching threshold (100% duty cycle) v t 100 = v s x 1 = (v batt - i s x r 3 ) x 1 v t < 100 = high switching threshold (< 100% duty cycle) v t < 100 = v s x 2 = (v batt - i s x r 3 ) x 2 v tl = low switching threshold v tl = v s x 3 = (v batt - i s x r 3 ) x 3 where 1 , 2 and 3 are fixed values calculation example the above mentioned threshold voltages are calculated for the following values given in the data sheet. v batt = 12 v, i s = 4 ma , r 3 = 150 ? , 1 = 0.7, 2 = 0.67 and 3 = 0.28 v t100 = (12 v - 4 ma x 150 ? ) x 0.7 | 8 v v t<100 = 11.4 v x 0.67 = 7.6 v v tl = 11.4 v x 0.28 = 3.2 v oscillator frequency 3 cases have to be distinguished 1. f 1 for duty cycle = 100%, no slope reduction with capacitor c 4 (see figure 4) 2. f 2 for duty cycle < 100%, no slope reduction with capacitor c 4 . for a duty cycle of less than 100%, the oscillator frequency, f, is as follows: 3. f 3 with duty cycle < 100% with slope reduction capacitor c 4 (see ?output slope control?) electrical parameters are given for te mperature range from minus 40 to + 110 and v batt . from 9 to 16,5v. operation is guaranteed for vbatt from 6 to 9v. all electr ical parameters are specified relatively to ?common? output (02). by selecting different values of c 2 and c 4 , it is possible to have a range of oscillator frequencies from 10 to 2000 hz as shown in the data sheet. rev. 00
IL6083 output slope control the slope of the lamp voltage is internally limited to r educe radio interference by lim itation of the voltage gain of the pwm comparator. thus, the voltage rise on the lamp is proportional to t he oscillator voltage increase at the switchover time according to the equation. via an external capacitor, c 4 , the slope can be further reduced as follows: to damp oscillation tendencies, a resistance of 100 ? in series with capacitance c 4 is recommended. interference suppression ? ?on-board? radio reception according to vde 0879 part 3/4.81 ? test conditions refering to figure 3 ? application circuit according to figure 1 or figure 4 ? load: nine 4 w lamps in parallel ? duty cycle = 18% ? v batt = 12 v ? f osc = 100 hz figure 3. voltage spectrum of on-board radio reception rev. 00
IL6083 pins 5 and pin 6, short-circuit protection and current sensing short-circuit detection and time delay , t d the lamp current is monitored by means of an exter nal shunt resistor. if the lamp current exceeds the threshold for the short-circuit detection circuit (v t2 90 mv), the duty cycle is switched over to 100% and the capacitor c5 is charged by a current source of i ch - i dis . the external fet again is switched off after the cut- off threshold (v t5 ) is reached. switching on the fet again is possible after a power-on reset only. the current source, i dis , ensures that the capacitor c 5 is not charged by parasitic currents. the time delay, td, is calculated as follows: current limitation the lamp current is limited by a control amplifier to protect the external power transistor. the voltage drop across the external shunt resistor ac ts as the measured variable. current limitation takes place for a voltage drop of v t1 100 mv. owing to the difference v t1 - v t2 10 mv, it ensures that cu rrent limitation occu rs o n l y when the short-circuit detec tion circuit has responded. after a power-on reset, the output is inactive for half an oscillator cycle. during this time, the supply voltage capacitor can be charged so that current limitation is guaranteed in the event of a short-circuit when the ic is switched on for the first time. pins 7 and 8, charge pump and output pin 8 (output) is suitable for controlling a power mosf et. during the active integration phase, the supply current of the operational amplifier is mainly supplied by the capacitor c 3 (bootstrapping). in addition, a trickle charge is generated by an integrated oscillator (f 7 400 khz) and a voltage doubler circuit. this permits a gate voltage supply at a duty cycle of 100%. rev. 00
IL6083 table of electrical parameters t amb = -40 c to + 110 c, v batt = 9 to 16.5 v, (basic function is guar anteed between 6.0 v to 9.0 v) reference point ground, unless otherwise specified (see figure 2) . all other values refer to pin gnd (pin 2). rate p a r a m e t e r s y mbol test c o n d i t i o n s m i n t y p . m a x unit pin 1 current consumption is 7.9 ma supply voltage v batt overvoltage detection, stage 1 2 5 v stabilized voltage v s i s = 1 0 m a 2 4 . 5 27.0 v switching o n 4 . 4 5 . 0 5 . 6 level of the lowered battery voltage v batt switching o f f 4 . 8 5 . 4 6 . 0 v battery overvoltage detection switching o n 1 8 . 3 2 0 . 0 2 1 . 7 stage 1 v batt switching o f f 1 6 . 7 1 8 . 5 2 0 . 3 v stage 2 switching on 25.5 28.5 32.5 detection stage 2 v batt switching o f f 1 9 . 5 2 3 . 0 2 6 . 5 v stabilized voltage v s i s = 3 0 m a 1 8 . 5 2 0 . 0 2 1 . 5 v short- circuit protection, pin 6 short-circuit current limitation v t1 v t1 = v s -v 6 8 5 1 0 0 1 2 0 mv v t2 v t2 = v s -v 6 7 5 9 0 1 0 5 short circuit voltage v t1 -v t2 v t2 = v s -v 6 3 1 0 3 0 mv delay timer short-circuit detection, vbatt = 12.0v, pin 5 switch off threshold v t5 v t5 = v s -v 5 1 0 . 2 1 0 . 4 1 0 . 6 v charge current i ch 1 3 ua dicharge current i dis 3 ua capacitance current i 5 i 5 = i ch -i dis 5 1 0 1 5 ma voltage doubler, pin 7 voltage v 7 duty cycle 100% 2v s v oscillator frequency f 7 2 8 0 4 0 0 5 2 0 khz 2 6 . 0 2 7 . 5 3 0 . 0 internal voltage limitation v 7 i 7 =5ma (whichever is lower) v s+14 v s+15 v s+16 v dv 8 /dt = 4 dv 4 /dt 5 3 6 3 7 2 edge rate 4 dv 8 /dt max 1 3 0 v/ms rev. 00
IL6083 rate p a r a m e t e r s y m b o l test c o n d i t i o n s m i n t y p e max unit gate output , pin 8 low level 0.35 0.70 0.95 vbatt = 16.5v tamb = 110 c, r 3 =150 ? 1.5* v o l t a g e v 8 high level, duty cycle 100% v 7 v v 8 = low level 1.0 c u r r e n t , i 8 v 8 = high level, i 7 >| i 8 | - 1 . 0 ma min: 2 =68nf 1 5 1 8 2 1 max: v batt 1 2 . 4 v , 1 0 0 duty cy cle t p ?? /t v batt = 16.5v, 2 =68nf 6 5 7 3 8 1 % oscillator, pin 4 f r e q u e n c y f 1 0 2000 h z 1 0 . 6 8 0 . 7 0.72 2 0 . 6 5 0 . 6 7 0.69 threshold cycle upper lower 3 0 . 2 6 0 . 2 8 0 . 3 oscillator current i osc v batt =12.0 v 34 45 54 ua f r e q u e n c y f 4 is open, 2 =68nf, duty cycle=50% 5 6 7 5 9 0 h z * reference point is battery ground rev. 00
IL6083 application circuit figure 4. application circuit rev. 00
IL6083 package outline dimension dip-8 n s u f f i x p l as t i c di p ( m s ? 00 1b a ) sy m b o l m i n m a x a 8. 51 10. 16 b 6. 1 7 . 1 1 c 5. 33 d 0. 36 0. 56 f 1. 14 1. 78 g h j 0 10 k 2. 92 3. 81 no t e s : l 7. 62 8. 26 1. d i m e n s i o n s ?a ?, ?b ? d o n o t i n cl u d e m o l d f l as h o r p r o t r u s i o n s . m 0. 2 0 . 3 6 m a x i m u m m o l d f l a s h o r p r o t r u s i o n s 0. 25 m m ( 0 . 010) p e r s i d e . n 0. 38 d i me n s i o n , mm 2. 54 7. 62 l h m j a b f g d se a t i n g pl an e n k 0. 2 5 ( 0 .0 10 ) m t -t - c 1 8 4 5 rev. 00
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